¡¡Chinese Journal of Computers   Full Text
  TitleInstruction Fusion Technology for the MIPS
  AuthorsCHEN Wen-Zhi JIANG Zhen-Yu WU Fan
  Address(College of Computer Science and Technology, Zhejiang University, Hangzhou 310027)
  Year2008
  IssueNo.11(1888¡ª1897)
  Abstract &
  Background
Abstract As a typical representative of RISC architecture, MIPS has the problem of low code density and ineffective utilization of instruction fields, making procedure volume expansion. The authors made some extensions to the existing MIPS Instruction Set, called exMIPS ISA. The authors propose an instruction fusion technology for the MIPS architecture. The pre-fetched instructions was converted into exMIPS ISA, and multiple sequential instructions was compressed and merged into a single instruction when meeting the fusion-condition. A fused instruction¡®s execution is equivalent to multiple instructions running at the same time, and will gain extra CPU performance. The process of instruction fusion also enhances the effective utilization of the instruction fields and improves code density. Experimental results from SimpleScalar simulation platform show that great improvement can be achieved.
Keywords instruction fusion;code compression;MIPS instruction set extention;ILP;SimpleScalar