¡¡	Chinese Journal of Computers   Full Text
Title	HPP: An Architecture for High Performance and Utility Computing
Authors	SUN Ningª²Hui1) LI Kai2) CHEN Mingª²Yu1)
Address	1)(Key Laboratory of Computer System and Architecture, Institute of Computing Technology, Chinese Academy of Sciences, Beijing 100190) 2)(Department of Computer Science, Princeton University, Princeton, New Jersey 08544, USA)
Year	2008
Issue	No.9(1503¡ª1508)
Abstract &   Background	Abstract An architecture of high performance computer, called Hyper Parallel Processing (HPP), is proposed to satisfy the requirements of both High Performance Computing, and Utility Computing which will be the application model of data centers. HPP combines the benefits of the scalability of MPP, the communication efficiency of DSM, as well as the commodity of cluster. Comparisons of current main-stream high performance computer architectures show that none of them can satisfy both HPC and utility computing. The main features of HPP are Global Address Space(GAS) and Hyper Node with single Operating System image. HPP supports the distributed global address space including both memory and I/O, but without hardware cache coherence. A Hyper Node consists of a set of application specific CPUs and a (or more) OS specific CPU. The OS CPU maintains the single system image, while the application CPUs run only lightweight run-time software. Besides the GAS interconnect network for applications, a standard SAN connects all OS CPUs and I/O devices providing system management and storage service. HPP is able to provide many opportunities of innovative research in High Performance and Utility Computing areas, including communication, synchronization, programming model, node operating system, utility computing, fault isolation, CPU and system etc. According to HPP architecture, a prototype system of Dawning5000 HPC is implemented and the feasibility of HPP is proved. Keywords high performance computing; utility computing; computer architecture; hyper parallel processing; petaflops Background Today high performance computer architecture has developed into a transforming age. The main-stream cluster architecture is facing more power and reliability problem. Many new technologies such as multi-core are emerging. Researchers in the world are doing research on the new architecture. An ideal architecture should solve the petaflop-scale problem as well as the commercialization issue of middle-to-small scale system. There are many technical and application challenges. The Institute of Computing Technology has been working on high performance computer for a long period. According to the trend, the authors propose a new architecture, hyper parallel processing, to satisfy the requirements of both High Performance Computing and Utility Computing. This work is supported by the National Science Foundation of China and the Hi-tech research and development program of China. The International Partnership Project of Chinese Academy of Sciences also supported the cooperation with Professor LI Kai of Princeton University. This paper is a progress report of this work. The motivation, main issue, basic definition and research chances of HPP are given in this paper. Now the simulator and a FPGA prototype of HPP are already finished. Test and analysis result will be presented later.