Chinese Journal of Computers   Full Text
Title	A New Design for 9/7-Tap Wavelet Filter and Its VLSI Implementation
Authors	TIAN Xin TAN Yi-Hua TIAN Jin-Wen
Address	(State Key Laboratory for Multi-Spectral Information Processing Technologies, Institute for Pattern Recognition & Artificial Intelligence, Wuhan 430074)
Year	2008
Issue	No.3(411—418)
Abstract &   Background	Abstract This paper designs a new kind of lifting 9-7-tap wavelet filter with binary characteristics and presents a high speed VLSI structure for the wavelet filter. The coefficients of the lifting filters are binary numbers, so it can simplify the VLSI design. The test results for compression performances have shown that the new filter is good almost as CDF97 under PSNR. when the data has a finite accuracy, it may have a better performance than CDF97. The filter can be implemented with using adders and shifters. Therefore the hardware resources can be saved and the critical path can be shortened. According to using the folding technology and the retiming technology, the architecture of the design can be transformed into a kind of embedded folding architecture which leads to the parallel computation of addition operations. So the critical path can be shortened to nearly the time of a addition operation and the utilization of the hardware resources also has a good performance. Simulation results show that the max working frequency could almost reach 250MHz which is the four times by the CDF97; The occupied logic cell is reduced by 66.7 compared with the CDF97+4 stages pipeline. So it is especially suitable for the high speed VLSI design. keywords wavelet transform; parallel computing; folding architecture; critical path; VLSI background The discrete wavelet transform (DWT) is a multi-scale frequency analyzer. It decomposes a signal into many subbands with different frequency characteristics. The higher frequency subbands have finer time resolution, and the lower frequency subbands have coarser time resolution. Since it outperforms some traditional time-frequency representations such as the short-time Fourier transform, the DWT has been considered suitable in many image coding applications. But in real-time applications the DWT must operate under high speed, therefore many VLSI architectures have been reported to achieve real-time computing and high hardware utilization. The realization of the one-dimensional(1-D) DWT can be classified into two categories: one is based on the convolution operation, and the other based on the lifting scheme. The lifting-based wavelet transform has many advantages over convolution-based one including in-place computation, integer-to-integer transform, reducing the number of arithmetic operations and the size of registers etc. But the lifting structure of DWT has more critical path latency. Pipelining can be employed to reduce the critical path latency, but it leads to the increasing number of register used in DWT. Flipping structure for DWT, which aims at shorting the critical path latency and reducing the number of the pipeline registers required in one-dimensional(1-D) DWT architecture. But the lifting coefficients are all irrational number, they need to be approximated by using binary fraction. So the compression performance could be reduced. This paper designs a new kind of lifting 9-7-tap wavelet filter with binary characteristics and presents a high speed VLSI structure for the wavelet filter. The coefficients of the lifting filters are binary numbers, so it can simplify the VLSI design. The test results for compression performances have shown that the new filter is good almost as CDF97 under PSNR. when the data has a finite accuracy, it may have a better performance than CDF97. This work is supported by the National Research Program (973 Program) of China under grants 2006CB701303 and the Nature Science Foundation of Hubei Province under grants 2006ABA088, in which the efforts in this paper focus on solving the problems of high speed VLSI design. The research group has got a lot of research results in the area. Some of them are included in SCI (Science Citation Index), such as the paper titled "Efficient high-speed/low-power line-based architecture for two-dimensional discrete wavelet transform using lifting scheme".