Chinese Journal of Computers   Full Text
Title	Crosstalk-Induced Delay Oriented Static Timing Analysis and Its Application to VLSI Test
Authors	ZHANG Min-Jin1),2) LI Hua-Wei1) LI Xiao-Wei1)
Address	1)(Key Laboratory of Computer System and Architecture, Institute of Computing Technology, Chinese Academy of Sciences, Beijing 100080) 2)(Graduate University of Chinese Academy of Sciences, Beijing 100049)
Year	2007
Issue	No.10(1681—1688)
Abstract &   Background	Abstract As the feature size continues to shrink into the nanometer era, the crosstalk-induced effect on circuit timing becomes significant. It is essential that potential crosstalk-induced delay effects should be estimated, identified, tested accurately and quickly. This paper proposes a novel path-based static timing analysis technique for multiple coupling effects. In this method, multiple crosstalk-induced effects are analyzed by considering a critical path and the sub-paths which propagate the transition signals to the aggressor lines coupled to the critical path. A new structure, transition map, is introduced to record all the possible arrival time of a line. Based on it, we can accurately identify the potential crosstalk noise sources, and efficiently find critical paths in presence of crosstalk as well as proper sub-paths to activate maximal coupling effects on a critical path. We can trade off accuracy and runtime by controlling the size of time scale used in transition map, which makes this approach highly scalable. The application of this method to the delay test based on Precise Crosstalk-induced Path Delay Fault model is given. Experiments on ISCAS89 benchmark circuit show the proposed technique can be applied to analysis and test of crosstalk-induced effects for large circuits within an acceptable time. keywords crosstalk； static timing analysis; path delay fault; delay test background This work is supported in part by the National Natural Science Foundation of China under grant Nos.60606008, 60633060, and in part by the National Basic Research Program(973 Program) of China under grant Nos.2005CB321605, 2005CB321604. Crosstalk-induced delay exerts a more significant adverse influence on circuit performance. It is essential that the effect should be analyzed and tested accurately and quickly. Generally, the timing window obtained by static timing analysis can be used to resolve this question, but the imprecision of timing window may result in pessimistic estimate and postpone the design closure. This motivates us to find a more accurate timing-based method. The authors have made research for crosstalk effects in circuit since 2002 and introduced many new fault models and test generation methods. This paper presents a new static timing analysis method and a crosstalk-oriented path delay test technique. This highly scalable method can effectively identify and test multiple crosstalk-induced path delay fault.