Chinese Journal of Computers   Full Text
Title	Prefetching Policy Using Miss Queue Information
Authors	HUAN Dan-Dan1),2) LI Zu-Song1),2) HU Wei-Wu1) LIU Zhi-Yong1)
Address	1)(Key Laboratory of Computer System and Architecture,Institute of Computing Technology, Chinese Academy of Sciences, Beijing 100080) 2)(Graduate University of Chinese Academy of Sciences, Beijing 100039)
Year	2007
Issue	No.7(1104—1114)
Abstract &   Background	Abstract With the processor-memory performance gap continuing to grow, the performance of memory access becomes the major bottleneck of the performance improvement for modern microprocessors. Prefetching policy using miss queue information is proposed by investigating instruction cache misses and data cache misses. The prefetching policy increases the efficiency of stream allocation by maintaining the sequence of instruction cache misses and data cache misses. Prefetching is initiated when no future memory access requests are in miss queue and system bus is idle. Thus it reduces the negative effect on bandwidth. The prefetching policy has filter scheme which increases the accuracy of prefetching and decreases the waste of bandwidth. Experiment results indicate that on average 30% memory access latency is decreased. The performance is improved significantly. The average IPC speedup is 8.3%. keywords prefetch; Cache miss; Godson-2 background As processor performance increases, there is a corresponding increase in the demand on the memory system. This paper introduces the prefetching policy using miss queue information. The Godson series processors are the first attempt to design high performance general-purpose microprocessor in China. Prefetching policy using miss queue information improves the performance of Godson-2 processor efficiently. This work is supported by the National Science Foundation of China (60325205), the National High Technology Research and Development Program (863 Program) of China (2005AA119020) and the National Basic Research Program(973 Program) of China (2005CB321600).