|¡¡||Chinese Journal of Computers Full Text|
|Title||Architecture of the Godson-1 Processor|
|Authors||HU Wei-Wu TANG Zhi-Min|
|Address||£¨Institute of Computing Technology, Chinese Academy of Sciences, Beijing 100080£©|
| Abstract &|
|The Godson-1 processor is a general purpose high performance processor developed in Institute of Computing Technology, Chinese Academy of Sciences. This paper first gives the |
background and considerations of designing the Godson series of microprocessors. It then introduces the architecture of the Godson-1 processor, including its out-of-order instruction pipeline, precise exception strategy, branch prediction, memory management, and security design to avoid buffer-overflow attack. Test and performance analysis show that the dynamic instruction pipeline of the Godson-1 processor is efficient and its security design can effectively defense network attack based on buffer-overflow technique. However, the cache of Godson-1 processor is not large enough and its organization could be improved .
keywords Godson-1; processor; architecture; instruction pipeline; out-of-order execution; performance analysis